Hiring for RTL Design Engineer, Hyderabad for Exp. 5 - 8 Years at Invecas technologies Pvt Ltd.,Koch (Job in Kochi)
(Not Shown) (Please mention IndiaDynamics.com when contacting)
Job Description: Domain Knowledge:- 1) ARM or any other CPU sub-system design including experience in caches, processor pipeline, coherency is desirable. 2) Bus architecture design experience including AMBA/Intel/AMD buses, PCIE, USB, HyperTransport, SATA, MAC, SPI is desirable. 3) Experience in multi-media units such as JPEG/MPEG encoder/decoders, CSI, DSI, ISP is desirable. 4) Experience in memory sub-system design including memory controller, master or slave, DDR interfaces is a plus. 5) Experience in automotive safety, virtualization, AI is a plus. Technical Expertise:- 1) Clear knowledge of working principles of CPU pipelines, coherent backbone system, ordering, arbitration principles, virtual channels, image-video processing pipelines. 2) Experience in developing microarchitecture of complex blocks. 3) Experience in RTL coding in Verilog/VHDL, RTL linting, synthesis, timing closure basics. 4) Understanding of clock, reset domains, clock-gating, power-aware design measures. 5) Understanding of verification methodology, prior experience in working closely with verification experts, insight in sub modules that can turn out to be verification critical is a plus. 6) Understanding of DFD/DFT is a plus. 7) Experience in System-Verilog, Perl, Python, Shell, Make/Makepp is a plus. 8) Experience in grounds-up design is a plus.